HBTs are attracting considerable attention as such transistors are capable of being used in high frequency applications such as RF applications, and being integrated in CMOS processes without requiring many additional processing steps.
An example of such a HBT is for instance disclosed in EP 1 406 308 A2. As has been disclosed in this patent application, Si—Ge—C alloys may be advantageously used as a base material in such transistors as the addition of carbon to the well-known Si—Ge alloys improves the controllability of the diffusion of boron impurities in the intrinsic base, thus improving the controllability of the performance characteristics of the HBT, which facilitates the use of the transistor in e.g. RF applications. However, a drawback of the HBT disclosed in EP 1 406 308 A2 is that its manufacture is rather complex, which adds to the cost of the integrated circuit (IC) into which the HBT is to be integrated.
FIG. 1 shows another known HBT having a reduced manufacturing complexity. The HBT is formed on a mono-crystalline silicon substrate 10 having shallow trench isolation regions 12 in between which a collector impurity 11 is implanted into the substrate 10. The base has been formed by depositing a stack of a first intrinsic Si—Ge—C layer 26, a boron-doped Si—Ge—C layer 28 and a further intrinsic Si—Ge—C 30 layer into a trench formed in a stack comprising a poly-Si layer 16 and a nitride layer (not shown). The poly-Si layer 16 is sometimes referred to as a poly-Si gate because it may be deposited using the same CMOS processing steps to deposit a poly-Si gate for a FET. It should however be understood that the poly-Si layer 16 acts as a contact rather than a control terminal in a HBT, as will be explained in more detail below. Obviously, a bias voltage may be applied to the extrinsic base contact 16.
The carbon-doped layers 26 and 30 surrounding the boron-doped Si—Ge—C layer 28 act as boron diffusion buffer layers during activation of the base such that the boron impurity remains largely confined to the Si—Ge—C layers, thus resulting in a highly doped base, which ensures that the base can cope with high switching speeds. The carbon content in these layers ensures that boron migration is retarded to such an extent that by the appropriate choice of layer dimensions and carbon impurity levels, the boron can be effectively confined to the Si—Ge containing layers following annealing.
An emitter 36 is stacked onto the intrinsic base layer 28. In such a HBT, the emitter 36 is usually contacted from above and the collector 11 is usually contacted through the substrate 10, i.e. from below. The base 28 is typically contacted through lateral contacts, which are commonly referred to as extrinsic base regions. The extrinsic base regions are formed in the poly-Si layer 16 over an oxide 14, and are separated from the emitter 36 by sidewall spacers 34.
In order to obtain a good contact between the extrinsic base regions 16 and the intrinsic base 28, the extrinsic base regions 16 are usually implanted with a boron impurity, which is subsequently (laterally) diffused by an anneal step to connect the extrinsic and intrinsic base regions.
However, a drawback of this device is that the vertical portions of the intrinsic Si—Ge—C buffer layer 26 that separate the boron-doped Si—Ge—C intrinsic base layer 28 from the extrinsic base regions prohibit the diffusion of boron between the extrinsic base and the intrinsic base region during annealing, such that the resulting device suffers from a higher than desirable base resistance.
This is shown in FIG. 2, in which the boron lateral concentration due to the presence of a negative spike in the boron concentration profile along the line A-A′, i.e. at the first intrinsic Si—Ge—C layer. The negative spike 40 occurs in the intrinsic Si—Ge—C layer 26, which as previously explained prohibits the lateral migration of the boron implant in the extrinsic base region 16 towards the Si—Ge—C layer 28. The Ge-containing region of the HBT of FIG. 1 has been labeled Ge in FIG. 2. The positive spike 50 corresponds to the boron concentration in the Si—Ge—C layer 28. The relatively high base resistance caused by the negative spike 50 limits the performance of the HBT in high frequency applications such as RF devices.